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B.E. Semester - V (IT)
IT-701 Parallel Processing

 

Teaching Scheme

Exam Scheme

Th.

Pract.

Total

Th.

Pract.

TW/Viva

Total

04 Marks

02 Marks

06 Marks

100 Marks

25 Marks

25 Marks

150 Marks

Hrs./Week

Hrs./Week

Hrs./Week

(3 Hrs.)

(3 Hrs.)

(3 Hrs.)

(3 Hrs.)

 

Introduction to parallel processing. Architectural classification and techniques.

 

Arithmetic and instruction pipelines, pipelining hazard and scheduling theory, super scalar architectures, asynchronous pipelines.

 

Interconnection network, hyper cubes, Suffle exchanges, tree, meshes and butterfly networks, parallel algorithm for linear algebra, sorting, Fourier transformation. systolic arrays.

 

Vector Processors.

 

Shared memory multiprocessor system.

 

Data Flow architectures.

 

Parallel processing - software issues, operating system for parallel processor.

 

Selected case studies for parallel computing systems.

 

Reference Books :

  1. Computer architecture and quantitative approach, -By John L. Hennessy and David A. Patterson, Morgan Kaufman publishers. Inc 1990.

  2. Computer architecture and parallel processing, -By Kai Hwang and Faye A. briggs, Mcgraw hill International editions, 1985.

  3. Computer structure; principles and examples, -By D. P. Siewiorek, C.G.Bell, A Newell, McGraw Hill, 1982.


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